Soft Ip Customization Models Based on High-level Abstractions

System-on-Chip (SoC) design raises an abstraction level in hardware (HW) design beyond a domain language specification. This requires the introduction and adoption of high-level analysis and specification methods that provide reusability, layericity, orthogonality, heterogeneity and customizability for HW design. HW design has many levels of abstraction. The transition between these levels can be described using a concept of design process. As there may be many representation and design methods for a designer to choose from, while implementing a certain design process, we describe several Design Flow Models aimed at implementing customization in soft IP-based HW design. These models apply several concepts taken from software engineering (object-oriented and pattern-based design, metaprogramming, parsing, and markup languages) to HW design.